1. Field of the Invention
The present invention relates to an image display system. More particularly, the present invention relates to an image display apparatus with one or more spatial light modulators and an adjustable light source control by a control circuit to achieve higher quality of display images.
2. Description of the Related Art
Even though there have been significant advances made in recent years in the technology of implementing electromechanical micromirror devices as spatial light modulators (SLM), there are still limitations and difficulties when these are employed to display high quality images. Specifically, when the display images are digitally controlled, the quality of the images is adversely affected because the images are not displayed with a sufficient number of gray scale gradations.
Electromechanical mirror devices are drawing a considerable amount of interest as spatial light modulators (SLM). The electromechanical mirror device is commonly implemented with a mirror array that includes a large number of mirror elements. In general, the number of mirror elements may range from 60,000 to several millions and are formed on the surface of a substrate controlled by electric circuits also formed on the substrate to function as an electromechanical mirror device.
Refer to FIG. 1A for a digital video system 1 as disclosed in a relevant U.S. Pat. No. 5,214,420, which includes a display screen 2. A light source 10 is used to generate light energy to illuminate display screen 2. Light 9 is further concentrated and directed toward lens 12 by mirror 11. Lens 12, 13, and 14 serve a combined function as a beam collimator to direct light 9 into a column of light 8. A spatial light modulator 15 is controlled by a computer through data transmitted over data cable 18 to selectively redirect a portion of the light from path 7 toward lens 5 to display on screen 2. The SLM 15 has a surface 16 that includes switchable reflective elements, e.g., micro-mirror devices 32 with elements 17, 27, 37, and 47 as reflective elements attached to a hinge 30, as shown in FIG. 1B. When element 17 is in one position, a portion of the light from path 7 is redirected along path 6 to lens 5 where it is enlarged or spread along path 4 to impinge the display screen 2 so as to form an illuminated pixel 3. When element 17 is in another position, light is not redirected toward display screen 2 and hence pixel 3 would be dark.
Most of the conventional image display devices, such as the devices disclosed in U.S. Pat. No. 5,214,420, are implemented with a dual-state mirror control that controls the mirrors to operate in either an ON or OFF state. The quality of an image display is limited due to the limited number of gray scale gradations. Specifically, in a conventional control circuit that applies a PWM (Pulse Width Modulation), the quality of the image is limited by the LSB (least significant bit) or the least pulse width, since the control is related to either the ON or OFF state. Since the mirror is controlled to operate in either an ON or OFF state, the conventional image display apparatuses have no way of providing a pulse width to control the mirror that is shorter than the LSB. The lowest intensity of light, which determines the smallest gradation to which brightness can be adjusted when adjusting the gray scale, is the light reflected during the period corresponding to the smallest pulse width. The limited gray scale gradation due to the LSB limitation leads to a degradation of the quality of the display image.
In FIG. 1C, a circuit diagram of a control circuit for a micro-mirror according to U.S. Pat. No. 5,285,407 is presented. The control circuit includes memory cell 32. Various transistors are referred to as “M*” where * designates a transistor number and each transistor is an insulated gate field effect transistor. Transistors M5, and M7 are p-channel transistors; transistors, M6, M8, and M9 are n-channel transistors. The capacitances, C1 and C2, represent the capacitive loads presented to memory cell 32. Memory cell 32 includes an access switch transistor M9 and a latch 32a, which is the basis of the Static Random Access switch Memory (SRAM) design. All access transistors M9 in a row receive a DATA signal from a different bit-line 31a. The particular memory cell 32 to be written is accessed by turning on the appropriate row select transistor M9, using the ROW signal functioning as a word-line. Latch 32a is formed from two cross-coupled inverters, M5/M6 and M7/M8, which permit two stable states. State 1 is Node A high and Node B low and state 2 is Node A low and Node B high.
FIG. 1D shows the “binary time periods” in the case of controlling the SLM by four-bit words. As shown in FIG. 1D, the time periods have relative values of 1, 2, 4, and 8 that in turn determine the relative intensity of light of each of the four bits, where “1” is the least significant bit (LSB) and “8” is the most significant bit. According to the PWM control mechanism, the minimum intensity of light that determines the resolution of the gray scale is a brightness controlled by using the “least significant bit” which holds the mirror at an ON position for the shortest controllable length of time.
For example, assuming n bits of gray scales, the frame time is divided into 2n−1 equal time periods. For a 16.7 milliseconds frame period and n-bit intensity values, the time period is 16.7/(2n−1) milliseconds
When adjacent image pixels are shown with a great degree of difference in the gray scales, due to a very coarse scale of controllable gray scale, artifacts are shown between these adjacent image pixels. That leads to image degradations. The image degradations are especially pronounced in the bright areas of display, where there are “bigger gaps” between gray scales of adjacent image pixels. For example, it can be observed in an image of a female model that there are artifacts shown on the forehead, the sides of the nose and the upper arm. The artifacts are generated by technical limitations in that the digitally controlled display does not provide sufficient gray scales. Thus, in the bright areas of the display, the adjacent pixels are displayed with visible gaps of light intensities.
As the micromirrors are controlled to have a fully on and fully off position, the light intensity is determined by the length of time the micromirror is at the fully on position.
In a previously disclosed technique to display a color moving picture by means of one SLM, shown in the example of FIG. 2, each frame is divided into three subfields corresponding to the three primary colors of red, green, and blue and a color sequential control is performed. As shown in FIG. 2, the light intensity of the green laser light pulses in the green subfield Gf1 is held constant at PG2 while a micromirror is controlled to an ON or OFF position by a PWM. Accordingly, the intensity of green light in the projected image visually perceived by an observer varies depending on the length of time in which a micromirror is at an ON position in one green subfield Gf1. The same can be said for the display blue and red light.
In order to increase the number of gray scale gradations of a display, the switching speed of the micromirror must be increased such that the digital control signals can be increased to a higher number of bits. However, when the switching speed of the micromirrors is increased, a stronger hinge is necessary for the micromirror to sustain the required number of operational cycles for a designated lifetime of operation. In order to drive the micromirrors supported on a further strengthened hinge, a higher voltage is required. In this case, the higher voltage may exceed twenty volts and may even be as high as thirty volts. A micromirror manufacturing process applying the CMOS (Complementary Metal Oxide Semiconductor) technologies would probably produce micromirrors that would not be suitable for operation at this higher range of voltages, and therefore, DMOS (Double diffused Metal Oxide Semiconductor) micromirror devices may be required in this situation. In order to achieve a higher degree of gray scale control, a more complicated manufacturing process and larger device areas are necessary when a DMOS micromirror is implemented. Conventional modes of micromirror control are therefore facing a technical challenge in that gray scale accuracy has to be sacrificed for the benefit of a smaller and more cost effective micromirror display, due to the operational voltage limitations.
There are many patents related to light intensity control. These patents include U.S. Pat. Nos. 5,589,852, 6,232,963, 6,592,227, 6,648,476, and 6,819,064. There are further patents and patent applications related to different shapes of light sources. These patents includes U.S. Pat. Nos. 5,442,414, 6,036,318, 5,617,243, 5,668,611, 5,767,828 and Published Applications 2003/0147052 and 2006/0181653. U.S. Pat. No. 6,746,123 discloses special polarized light sources, for preventing light loss. However, these patents and patent applications do not provide an effective solution to overcome the limitations caused by insufficient gray scale gradations in the digitally controlled image display systems.
Furthermore, there are many patents and patent applications related to spatial light modulation, including U.S. Pat. Nos. 2,025,143, 2,682,010, 2,681,423, 4,087,810, 4,292,732, 4,405,209, 4,454,541, 4,592,628, 4,767,192, 4,842,396, 4,907,862, 5,287,096, 5,506,597, 5,489,952, 5,751,397, 6,897,884, and Published Patent Applications 2005/0,259,121, 2007/0,120,786, and 2008/0,068,359.